摘要 |
為進行矽晶圓薄化技術之研究及創新,本論文嘗試提出一系統性的研究創新方法與流程,協助學者對一新投入之技術領域進行學術或技術研究時,對該技術領域的研究現況、發展趨勢的分析、問題的妥善定義乃至於如何找到未曾被研究探討過的創新突破方向等程序,利用對技術地圖分析、心智圖法、文獻矩陣分析、TRIZ
理論等方法的整合及應用,獲得研究的切入點與創新構想。研究中除提出此一整合多種研究創新方法之流程與「文獻矩陣分析」的方法外,並針對
TRIZ 理論的學理發展提出包括「多組矛盾對狀況下 TRIZ 發明原則之優先選用法」及「物質-場分析中的場圖建立」等增進
TRIZ 使用成效之研究建議。隨著日益增進的薄化晶片、疊晶封裝等需求,對於己完成正面
IC電路製程的晶圓進行背面薄化程序己成為先進半導體製程中廣泛運用的技術。針對矽晶圓薄化技術,本論文整合系統性研究創新方法進行分析與研究,並整理歸納各項技術發展現況及趨勢。同時運用
TRIZ
理論、心智圖法進行創意激盪與構想整合,除提出二項創新專利提案外,並激發引導出三個相關研究主題,並藉由文獻矩陣分析的方法,協助
獲得研究主題的切入點與創新性。在晶圓薄化製程研究方面,本研究規劃以批次式製程同時進行晶圓厚度薄化與應力消除的程序,並應用系統性的實驗研究程序,透過田口法進行參數的優化,探討批次式蝕刻薄化的可行性,以期提高量產速率並降低設備投資需求。在薄化後晶圓翹曲問題的研究上,本研究經由第三章所獲得平衡力的概念,探討晶圓正、反面殘留應力的疊加與平衡效果,針對在相同iii的薄化製程參數下,不同的晶圓正面應力狀態對翹曲量的關係進行探討,以作為未來業界針對正面製程殘留應力的狀況,來界定合理翹曲規格時的參考。基於晶片的強度對於薄化後的後續製程良率、可靠度與產品品質的重要性,本論文就晶片破壞的機制、影響晶片強度的因素進行探討,並就不同的晶圓薄化背面製程對晶片強度之影響進行研究。另基於第三章所獲得之平衡力原理,驗證了薄化後晶圓的背面金屬薄膜鍍層對於提昇晶片強度的效果,未來業界只要能適度的調整背面金屬蒸鍍製程的參數,便可在不增加其他製程道次的情況下提昇產品晶片強度,而對品質及成本均有所助益。
關鍵字: 系統性創新、TRIZ 理論、晶圓薄化、晶圓翹曲、晶片強度
A systematic innovation process
for academic research works was proposed in this dissertation to
help scholars analyze technology research status, trends, and
problems as well as find out innovation chances while they are
getting in a new technology field. The TRIZ theory, the Mind
Mapping® method, and technical roadmap analysis were integrated
and an academic literature matrix analysis method was proposed
in this systematic innovation process to induce innovative
research ideas and solutions. Some improvements in TRIZ theory
were also proposed in this research. With an increasing demand
of thinner chips and the stacked-die packages, backside thinning
of fully processed IC wafers has become a widely used technique
in advanced semiconductor manufacturing. The systematic
innovation process was integrated in the research of the silicon
wafer thinning technique in this dissertation to analyze the
technology research status, trends and problems. As the results
of this innovation process, two patentable innovative concepts
and three potential research topics were generated and
identified. A systematic experimental study was conducted with
the Taguchi method to obtain the thinning parameters that could
successfully reduce both wafer thickness and residual stress
after the grinding process. Also more experiments were performed
to investigate the feasibility and associated problems of wafer
thinning process in batch type. In the study on the warping
problems for thinned wafers, the relation between warpage and
wafer thickness for wafers with different stress status on the
front side were investigated with the same backside wafer
thinning parameters. The results shown the stress on the front
side of wafers v represent dominant effects on the warping
problems of thinned wafers. Since the failure strength of
silicon is crucial in determining the manufacturing yield,
operational reliability and device performance of semiconductor
devices, the effects of the wafer backside roughen etching and
the metal deposition treatment toward strength of thinned
silicon dies have been investigated in this dissertation. The
results represented the wafer backside metal processing used in
this research could have a good performance to enhance the
strength of thinned silicon dies, i.e., the semiconductor
manufacturer could have the chance to improve the mechanical
performance as well as electrical or thermal performance of
thinned silicon dies while backside metal processing.
Keywords: systematic
innovation, TRIZ, wafer thinning, warpage,
die strength
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